This invention relates to a pattern forming technique using a charged particle beam or an electromagnetic wave beam, and more particularly to a pattern forming method and a pattern forming apparatus for positioning a beam of any voluntary shape and repeating shot exposure and butt-joining shots to form a desired pattern.
With the advance of high integration techniques relating to VLSIs and pattern dimension refining techniques, it has been difficult to secure accurate pattern dimensions. In particular, it is considered necessary to keep the dimensions of gate patterns within .+-.10% of the target dimension, in order to restrain variations in the characteristics of a transistor within an allowable range. Further, it is considered necessary to keep a dimension error due to lithography within .+-.7% of the above target dimension. For example, where the gate pattern dimension is 0.15 .mu.m, the allowable dimension error in the lithography process is less than .+-.0.0105 .mu.m.
Consider the case of forming a device pattern by first forming a master mask (a photomask, an X-ray mask, an electron beam mask, an ion beam mask, etc.) for the device pattern using a mask writing tool (which writes a pattern with an electron beam or a laser beam), then radiating the master mask with electromagnetic waves such as light, an X-ray, etc., or with charged particles such as an electron beam, an ion beam, etc. to thereby project an image of the mask on a wafer. In this case, the writing accuracy of the mask writing tool may be a main cause of the dimension error.
In the shot-by-shot exposure processing represented by the electron beam exposure technique, there are known a raster scan system for scanning a constant beam, and a vector scan system for positioning a beam at an individual coordinate to perform exposure thereat. The raster scan system performs beam scanning in an analog manner. In this case, to increase the speed of processing, the speed of beam scanning is increased. If the beam size is reduced in order to enhance the resolution, the speed of processing will inevitably decrease. As a method for realizing higher processing, the vector scan system is proposed, which employs a variable shaped beam and can increase the beam size. In this system, setting of the beam size and positioning of the beam are controlled by digital processing. Accordingly, the throughput and the pattern accuracy depend upon the setting speed of a DAC (digital-to-analog converter) employed therein.
A master mask such as a photomask, etc. requires high accuracy in pattern position and dimension. For example, a photomask for a semiconductor element requires that variations in pattern dimension should fall within a range of about 1/30 or less of a minimum line width, and variations in position should fall within a range of 5% or less of the minimum line width. In addition, further enhancement of accuracy is now required since the size of a semiconductor element has been reduced to 70% in every three years.